As integration density of conventional semiconductor devices increases, a thinner gate insulation layer may be used to suppress short channel effects and regulate a threshold voltage Vth. However, as gate insulation layer thickness decreases, a leakage current of a transistor resulting from tunneling to a gate electrode may increase and/or a breakdown phenomenon of the gate insulation layer may occur.
Conventionally, a gate insulation layer may be comprised of a high-k dielectric. The high-k dielectric may enable the gate insulation layer to remain more stable against the leakage current and/or the breakdown phenomenon. Moreover, the short channel effect of the transistor may be suppressed and/or the threshold voltage may be more easily regulated to cope with size reduction, increased integration and/or higher operating speeds of semiconductor devices.
Although conventional gate insulation layers may be comprised of the high-k dielectric, the leakage current may still exist because of gate induced drain leakage (GIDL) caused by concentration of an electric field established at the overlap area of a drain and the gate electrode. When the transistor is OFF or a negative bias applied a negative voltage, a relatively thin depletion layer may be formed at a drain region due to a gate bias applied to the gate electrode to concentrate the electric field at the edge of the drain adjacent to the gate electrode. The concentration of the electric field may result in the GIDL, which may increase in geometric progression with an increasing electric field.
To suppress the GIDL, conventionally, the gate insulation layer thickness may be reduced, doping concentration of lightly doped drain (LDD) may be reduced, concentration of a well formed at the semiconductor substrate may be reduced, an overlap area of the gate electrode and source/drain may be reduced and/or a tunneling volume (e.g., by heavily doping a drain to reduce the width of a depletion area) may be reduced. These conventional methods may increase the resistance of the LDD, which may degrade functionality of a semiconductor device (e.g., on-current of the transistor may decrease).